Infineon unveils 65nm handset chip
Infineon Technologies today unveiled handset chips equipped with its 65nm CMOS process technology and said that products with this new technology are expected to be market-ready towards the end of 2006.
The company said the chip puts more than 30 million transistors on a space of just 33mm2 and proves that Infineon is able to produce such major digital and analog circuitry in handsets as MCU/DSP cores, storage and analog/mixed-signal in 65nm technology to operate with high reliability. This space-saving technology was also used to manufacture high-frequency circuits for the first time, the company claimed.
“The data available today emphasizes the multifold strengths of our alliance strategy resulting in a leading position towards time-to-market, figure-of-merits, and manufacturing flexibility by pooling significant R&D resources and also exploiting a huge amount of intellectual capital,” said Hermann Eul, member of the Infineon Management Board and head of the Infineon Communication Solutions Business Group.
“Thanks to this technological breakthrough, we have proven that our strategy of innovative integration works and that the number of available functions will increase while the footprint decreases,” Eul added.
Infineon developed the technology in the 65/45nm research and development alliance ICIS consisting of IBM, Chartered Semiconductor Manufacturing, Infineon and Samsung Electronics. The mobile communications chip developed by Infineon was produced in the frame of a manufacturing agreement with Chartered in Singapore.
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